1. Field of the Invention
This invention relates generally to computer system memory, and more particularly, to methods and systems for minimizing computer system active process memory access time by adaptively partitioning the active process memory into uncompressed and compressed regions.
2. Description of the Related Art
Today, the performance of a computer system processor greatly depends on the speed the processor accesses data in the memory. To reduce memory access time, many computer system architectures implement memory hierarchy architectures wherein most frequently accessed information is defined in the memory level that can be accessed most expeditiously. In the alternative, the desired information is defined in the next fastest memory portion. In this manner, each memory level of the memory hierarchy is searched in the descending order until the desired information is found. One component in such a memory hierarchy is a cache memory.
Cache memories can usually be accessed more rapidly than disks, and are used between processing devices and main memory. Relying on the principle of locality, cache memories are used to increase the likelihood of the processor finding the desired data in the cache memory. For instance, continually used data is preferably defined in the physical memory space so as to reduce latencies associated with accessing non-resident data. However, as software applications become larger and more complex, the need to allocate more physical memory space to each process has become more evident. Despite such need, allocating more physical memory space to active processes is disfavored because of the significant cost of physical memory.
One solution to increase an active process physical memory space is partitioning the active processor physical memory into fixed-size compressed and uncompressed regions. Typically, such partitioning of physical memory is achieved at the time the computer system memory is being designed. In such a scenario, so long as the necessary data (i.e., the process working set) is limited, the process working set can usually be located in the uncompressed region of the main memory. Latency, however, can be associated with accessing data in the compressed region of the process memory if the process workload is greater than the process working set residing in the uncompressed region. Using fixed-size uncompressed and compressed regions becomes even more problematic when running large processes. In such scenarios, unless the size of the uncompressed and compressed regions, together, is greater than or equal to the entire working set of the active process, the latency associated with accessing data in the disk can significantly lower performance.
A different solution is allowing the memory management unit (MMU) to partition the process memory to fixed-size uncompressed and compressed regions. In such a scenario, however, if the compressed region of the process memory is larger than the uncompressed region (i.e., compression is performed aggressively), significant compression latency can be experienced, as a considerable amount of data is stored in the compressed region. If the compressed region of the process memory is smaller (i.e., compression is not performed sufficiently), considerable disk latencies can be experienced. In either scenario, system performance can suffer.
In view of the foregoing, there is a need for systems and methods capable of improving the performance of an active process by minimizing memory access time.